Computational VBSME Optimization: Motion-Only Partitioning with Progressive Early Termination

Vinutha Mallikarjunappa; T. M. Manu

doi:10.48084/etasr.16435

Authors

Vinutha Mallikarjunappa Department of Electronics Engineering (VLSI Design and Technology), NMAM Institute of Technology (NMAMIT), Nitte (Deemed to be University), Nitte, Udupi, Karnataka, India | Visvesvaraya Technological University, Belagavi, Karnataka, India
T. M. Manu Department of Electronics and Communication Engineering, KLE Institute of Technology (KLEIT), Hubballi, Karnataka, India | Visvesvaraya Technological University, Belagavi, Karnataka, India

Volume: 16 | Issue: 3 | Pages: 34914-34919 | June 2026 | https://doi.org/10.48084/etasr.16435

Received: 26 November 2025 | Revised: 1 January 2026 | Accepted: 6 January 2026 | Online: 6 June 2026

Corresponding author: Vinutha Mallikarjunappa

Abstract

This study presents two motion-only Variable Block Size Motion Estimation (VBSME) algorithms: Hierarchical Motion-Only VBSME (HMO-VBSME) and Integrated Bit-Planar Motion-Only Block Matching (IBPMO-BM). Both algorithms utilize pure motion vector characteristics for block size decisions while extending traditional motion estimation to support 32×32 blocks through a four-level structure (32→16→8→4). Both algorithms integrate directional search pattern optimization that adapts search positions based on previous motion vectors, reducing search complexity by 44% to 89%. HMO-VBSME employs hierarchical planar Sum of Absolute Differences (SAD) computation with multi-level early termination. IBPMO-BM introduces bit-SAD computation with early termination, using motion-driven block size selection. Experimental results on standard video sequences demonstrate that both algorithms maintain PSNR values comparable to Full Search Block Matching Estimation (FSBME), while achieving computational savings of 77% to 97%. A significant proportion of 32×32 blocks are selected (28.4% to 97.4% across sequences), reducing motion vector overhead and improving compression efficiency. These characteristics make both algorithms ideal for ultra-low-complexity real-time video coding applications.

Keywords:

motion estimation, variable block size, hierarchical SAD, bit-planar processing, motion-only analysis, video compression

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