Gowreesrinivas, K.V., Srinivas, S. and Samundiswary , P. 2023. FPGA Implementation of a Resource Efficient Vedic Multiplier using SPST Adders. Engineering, Technology & Applied Science Research. 13, 3 (Jun. 2023), 10698–10702. DOI:https://doi.org/10.48084/etasr.5797.