KAVYA, C. H.; VARADARAJAN, S. Pipelined Diagonal Matrix Codes for Error Correction in Embedded Memories. Engineering, Technology & Applied Science Research, Greece, v. 15, n. 5, p. 28201–28207, 2025. DOI: 10.48084/etasr.12069. Disponível em: https://mail.etasr.com/index.php/ETASR/article/view/12069. Acesso em: 18 may. 2026.